Benefits of SOI

(Courtesy of ARM, IBM, and Soitec, August 2007)

SOI provides significant PPA advantages over bulk CMOS for digital applications using standard EDA flows and physical IP.

SOI CMOS technical benefits compared to bulk CMOS:

Higher performance Lower power Area savings High reliability
Reduced junction capacitance translates into faster transistor ON/OFF switching speed SOI circuit higher performance capability allows voltage (Vdd) reduction Synthesis tool picks samller cell in SOI to achieve a given speed in digital design Reduced susceptibility to electro-magnetic interference
Boost effect of floating body during transistions Smaller cells needed to achieve the same performance No wells, no taps, no latchup in SOI, enables denser layout Reduced soft error rates (SER)
No reverse substrate bias effect in cells using stacked transistors Reduced junction capacitance SOI eDRAM provides high-density memory SOI circuits are capable of withstanding higher temperatures (~300C)

higher performance at the same power
lower dynamic power for the same performance

It's ideal for a broad set of applications

Mobile devices, where:
lower dynamic power reduces the overall operating power for graphic-intensive mobile applications;
RF design can strongly benefit from SOI substrate isolation and passive component enhancement;
application processors target higher performance in tighter power envelopes for the next digital mobile experience.

Consumer electronics and gaming, where:
smaller form factors are key;
better thermal management is required;
performance gains can simplify system designs.

Embedded markets, where:
the emphasis is on performance, size, power and reliability especially under challenging conditions as found in automotive, industrial, and medical markets.

Dataprocessing including graphics and storage, where:
SOI is intended to enable higher system performance, more cache memory, and better power envelope management, leading to cheaper packaging solutions.