SOI Applications

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Updated: May 17, 2013

SOI Fundamentals

Bulk vs SOI FinFET
[SOI Industry Consortium]

Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]

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Process Technology

SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]

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Smart power saves power
ST’s newest SOI-based smart power technology delivers big reductions in power consumption in medical equipment, hybrid-electric-vehicle chargers and more. [Advanced Substrate News]

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Photonics

Imec and Genalyte have successfully developed and produced a set of disposable SOI-photonics biosensor chips for Genalyte’s diagnostic and molecular detection equipment
[Advanced Substrate News]

Photonics on the Move
SOI is at the heart of silicon photonics. Here’s an overview of past, present and future trends. [Advanced Substrate News]

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Power

NovaThor SmartPhone Chip on 28nm FD-SOI: ST-Ericsson Blogger Tells All; PC Mag Sees Light
[Advanced Substrate News]

Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]

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Sensors/MEMS

SiTime: Using SOI Technology to Develop High-Performance MEMS Timing Solutions
A radical SOI-based approach puts SiTime at the top of the fast-growing silicon-based timing market. [Advanced Substrate News]

Imec and Genalyte have successfully developed and produced a set of disposable SOI-photonics biosensor chips for Genalyte’s diagnostic and molecular detection equipment
[Advanced Substrate News]

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3D integration

Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin [Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]

Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability [EV Group (EVG)]

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Last post on May 17, 2013 by Jean-Luc PELLOIE:

IEEE SOI Conference (Oct., Monterey) Expands, Extends Call for Papers

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#20 – Fall/Winter 2012/13
The Move to Fully-Depleted: Manufacturing, Economics, Design

FD-SOI: ST/Chery interview; CMP's MPW runs; IBS on cost-savings
FD & wafers: SEH & Soitec
IBM's Fin-on-Oxide/FinFET
SOI Consortium – FD-SOI & wafer capacity for mobile

> Read the full edition

Design clinic

Video training

Designers worldwide have been invited to attend the SOI Jump Start training which took place in San Jose, CA on April 28, 2010. This live event was hosted by Cadence and recorded on video.