SOI Applications
NEW Filter our 316 articles by market or company:
SOI Fundamentals
Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]
SOI Technology
[ISU Electrical and Computer Engineering Archives]
Process Technology
SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]
Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]
Fully Depleted SOI
ST: FD-SOI for Competitive SOCs at 28nm and Beyond
[Advanced Substrate News]
Power, Performance, Cost. FDSOI lets you pick any three. Want proof? How about an ARM Cortex-M0 processor core example?
[EDA360 Insider]
Design/IP
Video interview of David Desharnais (Cadence) by Jeff Wolf (SOI Industry Consortium)
[Chipestimate.tv]
Analog/HV/RF
Peregrine's New SP5T RF Switch Offers High Isolation for Infrastructure Apps
[Consumer Electronics Net]
RF Micro Devices(R) Introduces First Silicon Switches for 3G Smartphones and Other High Performance Applications
[RF Micro Devices]
Photonics
Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption.
[Department of Information Technology (INTEC), Ghent University]
Device engineering for silicon photonics
[NPG Asia Materials]
Power
A new integrated SOI power device based on self-isolation technology
[State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China]
NXP has launched the UBA2024 and UBA2024A integrated half-bridge power ICs, based on the company’s EZ-HV SOI technology
They enable the easy design of low-cost, very compact, high-reliability, long-life florescent lamp (CFL) applications.
[NXP]
Sensors/MEMS
How an SOI MEMS are built : MEMS first™ process
[SiTime]
A 12GHz bulk-micromachined RF-MEMS phase shifter by SOI layer-separation design
[IEICE Electronics Express]
3D integration
Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin
[Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]
Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability
[EV Group (EVG)]
Last post on February 03, 2012:
STMicroelectronics predicts its new SOI-based STOD13AS power chip could be used in nearly every new smartphone or small electronic device that has an AMOLED display
#18 - Fall/Winter 2011/12
SOI on the Roadmaps
- FD-SOI: ST & 28nm SOCs; ARM & design porting
- Apps – NXP automotive sensors, AMD 32nm Bulldozer
- SOI Conference (IBM, Intel, Leti, GloFo, ST, ARM, Peregrine & more)
- SOI Consortium – FD-SOI whitepaper overview & excerpts
Useful links
EuroSOI
The EUROSOI network embraces a broad range of research areas related to Silicon-On-Insulator technology (from materials to end-user electronic applications in traditionally strong European industrial sectors such as automotive, communications, space). EUROSOI aims at federating the existing research work on SOI topics and at providing an appropriate communication channel between academic groups and industrial production centres. EUROSOI coordination efforts will be focused on fostering different activities to improve the lack of industrial development in Europe in SOI topics. A network of research centres, industries and end-users is the appropriate tool to structure and organize the existing R&D work on SOI topics, and achieve a critical mass to efficiently close the gap between academic groups and industry, which is responsible for the weakness of European Industry with regard to SOI.
http://www.eurosoi.org/index.asp
GSA Ecosystem Portals
GSA has implemented Ecosystem portals focused on the major areas of the supply chain including IP, EDA, Test, Packaging and Manufacturing, as well as Analog/Mixed-Signal and MEMS. The Ecosystem Portals give SOI Industry Consortium access to GSA's unique market intelligence including: Tools, Articles, Presentations, Surveys, Reports and Whitepapers.
http://www.gsaglobal.org/eco/index.aspx
Hot news
ARTICLE Intel Delays Finfets
[Electronics Weekly]
ARTICLE ST: FD-SOI for Competitive SOCs at 28nm and Beyond
[Advanced Substrate News]
ARTICLE White paper: Considerations for Bulk CMOS to FD-SOI Design Porting
[SOI Industry Consortium]
ARTICLE Workshop: Fully Depleted SOI - April 28, 2011 - Hsinchu, Taiwan
[SOI Industry Consortium]
PUBLICATION Planar FD-SOI CMOS: The Competitive Advantage Mobile Silicon Technology
[SOI Industry Consortium]
PRESENTATION Evaluation of Fully-Depleted SOI for next generation Mobile Consumer Chips
[Horacio Mendez, Executive Director, SOI Industry Consortium]
