SOI Applications

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Updated: May 22, 2013

SOI Fundamentals

Process Technology

SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]

> More articles

Fully Depleted SOI

Design/IP

Analog/HV/RF

High Voltage and High Reliability Silicon-on-Insulator Power IC Technologies and Their Application to 750 V 4.5 A Micro-Inverter IC
[Japanese Journal of Applied Physics 51 (2012)]

Smart power saves power
ST’s newest SOI-based smart power technology delivers big reductions in power consumption in medical equipment, hybrid-electric-vehicle chargers and more. [Advanced Substrate News]

> More articles

Photonics

Imec and Genalyte have successfully developed and produced a set of disposable SOI-photonics biosensor chips for Genalyte’s diagnostic and molecular detection equipment
[Advanced Substrate News]

Photonics on the Move
SOI is at the heart of silicon photonics. Here’s an overview of past, present and future trends. [Advanced Substrate News]

> More articles

Power

Sensors/MEMS

3D integration

Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin [Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]

Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability [EV Group (EVG)]

> More articles

Advanced Substrate News

Last post on May 23, 2013:

MOSIS, a provider of low-cost prototyping and small volume production services for custom ICs, has teamed up with ePIXfab, the European Silicon Photonics support center providing low-cost prototyping services for photonic ICs.

> Read this post

#20 – Fall/Winter 2012/13
The Move to Fully-Depleted: Manufacturing, Economics, Design

  • FD-SOI: ST/Chery interview; CMP's MPW runs; IBS on cost-savings
  • FD & wafers: SEH & Soitec
  • IBM's Fin-on-Oxide/FinFET
  • SOI Consortium – FD-SOI & wafer capacity for mobile

> Read the full edition

Board and Management

Officers

Chair: Michael J. Cadigan

Treasurer: Laurent Malier

Executive Director: Horacio Mendez



Board of
Directors

André-Jacques Auberton-Hervé, Soitec (Chair Emeritus)

Michael J. Cadigan, IBM (Chair)

Joel Hartmann, STMicroelectronics

Laurent Malier, CEA-Leti (Treasurer)

Horacio Mendez, SOI Industry Consortium (Executive Director)

Michael Mendicino, Freescale Semiconductor

Udo Nothelfer, GLOBALFOUNDRIES

Simon Segars, ARM

C.S. Yeh, UMC

IP Committee

Technology Enablement Committee

Marketing Committee



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