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Presentations

Apr. 25, 2013Forum: FD-SOI Technology - April 22nd, 2013 - Hsinchu, Taiwan
The SOI Industry Consortium, IBM and GLOBALFOUNDRIES organized a forum focused on fully depleted technologies for highly energy-efficient System-on-Chip applications.
[SOI Industry Consortium]

Dec. 13, 2012Symposium: Fully Depleted Transistors Technology - December 10, 2012 – San Francisco, CA
Leading companies from the SOI Industry Consortium organized a symposium about the Fully Depleted Technologies, focused on energy-efficient System-on-Chip technology implementations using planar Fully Depleted transistors as well as Bulk and Oxide Isolated FinFETS comparisons.
[SOI Industry Consortium]

Mar. 5, 2012Workshop: Fully Depleted SOI - February 24, 2012 - San Francisco, CA
The SOI Industry Consortium, CEA-Leti and Soitec organized the 6th edition of the Fully Depleted Workshop, a full-day event at the Marriott Marquis Hotel in San Francisco, California, on February 24th following the ISSCC conference.
[SOI Industry Consortium]

Apr. 28, 2011Workshop: Fully Depleted SOI - April 28, 2011 - Hsinchu, Taiwan
The SOI Industry Consortium, CEA-Leti and Soitec organized the 5th edition of the FDSOI Workshop at the Ambassador Hotel, in Hsinchu, Taiwan on April 28 following the VLSI-TSA and VLSI-DAT conferences (April 25-27, 2011).
[SOI Industry Consortium]

Dec. 8, 2010Workshop: Fully Depleted SOI - Dec. 8, 2010 - San Francisco, USA
The SOI Consortium, the CEA-Leti and Soitec are organizing an evening workshop at Hilton San Francisco Hotel (333 O'Farrell St) on Wednesday the 8th of December 2010 following the IEDM Conference, focusing on the low power and high speed technology requirements for SOC applications, on design infrastructure and on the advantages for scaling.
[SOI Industry Consortium]

Sep. 25, 2010Workshop: Fully Depleted SOI - Sept. 25, 2010 - Tokyo, Japan
The University of Tokyo, the SOI Consortium, and Soitec organized a one day workshop at the Komaba Research Campus of the University of Tokyo on Saturday the 25th of September 2010 following the SSDM Conference focusing on the FDSOI ecosystem readiness.
[SOI Industry Consortium]

Dec. 31, 2009Workshop: Fully Depleted SOI - Dec. 9, 2009 - Baltimore, USA
Sponsored by Soitec and the SOI Consortium. Experts from around the world gather in Baltimore in December 2009 for a very lively debate on the progress and merits of Fully Depleted SOI.
[SOI Industry Consortium]

Oct. 31, 2009Workshop: FD SOI architecture, technology platform for Low Power applications for 22nm and beyond - Oct. 16, 2009 - Leuven, Belgium
The development of fully depleted SOI has gained strong momentum in recent years. Although initially FinFETs appeared to be a preferred FDSOI architecture, recent major advances in planar FDSOI devices are strongly positioning this technology towards an interception of the 22/20nm node for Low Power applications. From a design perspective, planar FDSOI is an evolutionary approach that is easier to implement than FinFETs. FDSOI CMOS has proved to reduce the Vt variability by 50-60%, makes possible the smallest SRAM cell operated at Vdd=0.5V with an excellent SNM, reduces Ioff by orders of magnitude and preserves a target performance at a cost per die that is comparable or lower than the equivalent bulk.
[SOI Industry Consortium]

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