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Updated: April 30, 2012
Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]
SOI Technology
[ISU Electrical and Computer Engineering Archives]
SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]
Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]
Soitec outlines fully depleted product roadmap for advanced planar and three-dimensional transistors
[Soitec]
NEW Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]
Interview With ST-Ericsson's Chief Chip Architect: SOCs on 28nm FD-SOI – When, Why and How
ST-Ericsson's Chief Chip Architect Louis Tannyeres talks with ASN about the move to 28nm FD-SOI for smartphones and tablet SOCs.
[Advanced Substrate News]
Peregrine's New SP5T RF Switch Offers High Isolation for Infrastructure Apps
[Consumer Electronics Net]
RF Micro Devices(R) Introduces First Silicon Switches for 3G Smartphones and Other High Performance Applications
[RF Micro Devices]
Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption.
[Department of Information Technology (INTEC), Ghent University]
Device engineering for silicon photonics
[NPG Asia Materials]
NEW Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]
Interview With ST-Ericsson's Chief Chip Architect: SOCs on 28nm FD-SOI – When, Why and How
ST-Ericsson's Chief Chip Architect Louis Tannyeres talks with ASN about the move to 28nm FD-SOI for smartphones and tablet SOCs.
[Advanced Substrate News]
SiTime: Using SOI Technology to Develop High-Performance MEMS Timing Solutions
A radical SOI-based approach puts SiTime at the top of the fast-growing silicon-based timing market.
[Advanced Substrate News ]
Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin
[Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]
Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability
[EV Group (EVG)]

Consortium Website – What’s New
#19 – Spring/Summer 2012
Special Edition: FD-SOI Industrialization

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BOSTON, MASS., February 23, 2008 – The SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation into broad markets, announced today that IMEC has joined the organization as an academic member. IMEC is a world-leading independent nanoelectronics research center headquartered in Leuven, Belgium. It has been active in the field of SOI technologies for more that two decades. “SOI has long been one of the key routes on IMEC’s roadmaps. In semiconductor technology, platform creation is of vital importance in making progress, creating critical mass, and identifying common interests between various players. That is what IMEC is doing, and that is what the SOI Industry Consortium is doing. We support the activities of the consortium and look forward to moving forward together,” says Luc Van den hove, Chief Operating Officer and Executive Vice President of IMEC. “We are extremely pleased to have IMEC as part of the SOI Consortium,” says Horacio Mendez, Executive Director of the SOI Industry Consortium. “IMEC is recognized as one of the world's leading semiconductor R&D institutes. The expertise and knowledge they bring to this partnership will be exceptionally valuable in maximizing SOI's capabilities.” IMEC’s collaborative CMOS scaling research platform targets technology generations two to three nodes ahead of state-of-the-art IC production. The activities are organized as a cluster of programs enabling very advanced research. Based on its long-standing track record and expertise, IMEC’s central focus in these programs is on advanced process module and device research including the exploration of new materials. Beside fundamental studies related to device physics, IMEC is also processing both partially depleted (PD) and fully depleted (FD) SOI devices. The SOI Industry Consortium is open to any company, organization or academic institution with an interest in SOI. About the SOI Industry Consortium: The SOI Industry Consortium is chartered with accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. Representing leaders spanning the entire electronics industry infrastructure, SOI Industry Consortium members include today: AMD, Applied Materials, ARM, Cadence Design Systems, CEA-Léti, Chartered Semiconductor Manufacturing, Freescale Semiconductor, IBM, IMEC, Innovative Silicon, KLA-Tencor, Lam Research, Magma Design, Nvidia, Samsung, Semico, Soitec, SEH Europe, STMicroelectronics, Symmid Semiconductor, Synopsys, Time To Market, TSMC, Tyndall Institute, University Catholique de Louvain, and UMC. Membership is open to all companies and institutions throughout the electronics industry. Legal Note The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions. Press Contact: Camille Darnaud-Dufour +33 (0) 6 79 49 51 43 camille.darnaud-dufour@soiconsortium.org About IMEC: IMEC is a world-leading independent research center in nanoelectronics and nanotechnology. IMEC vzw is headquartered in Leuven, Belgium, has a sister company in the Netherlands, IMEC-NL, offices in the US, China and Taiwan, and representatives in Japan. Its staff of more than 1650 people includes about 600 industrial residents and guest researchers. In 2008, its revenue (P&L) was estimated to EUR 264 million. IMEC’s More Moore research aims at semiconductor scaling towards sub-32nm nodes. With its More than Moore research, IMEC looks into technologies for nomadic embedded systems, wireless autonomous transducer solutions, biomedical electronics, photovoltaics, organic electronics and GaN power electronics. IMEC’s research bridges the gap between fundamental research at universities and technology development in industry. Its unique balance of processing and system know-how, intellectual property portfolio, state-of-the-art infrastructure and its strong network worldwide position IMEC as a key partner for shaping technologies for future systems. Further information on IMEC can be found at www.imec.be Contact: IMEC : Katrien Marent Director of External Communications T: +32 16 28 18 80 Mobile : +32 474 30 28 66 katrien.marent@imec.be
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PRESENTATION The Revolutionary Scope of Multi-Gate Transistors
[University of California Berkeley]
ARTICLE FD-SOI: A process booster for ST-Ericsson’s next generation NovaThor, Part 1
[ST-Ericsson Technology Blog]
ARTICLE Soitec outlines fully depleted product roadmap for advanced planar and three-dimensional transistors
[Soitec]
ARTICLE Soitec provides affordable paths to higher performance, lower-power processors for mobile and consumer devices
[Soitec]
PRESENTATION ST-Ericsson announces next-gen NovaThor at 28nm, on FD-SOI
[ST-Ericsson]
ARTICLE ST-Ericsson’s Next-gen NovaThor: This Year, at 28nm, on FD-SOI Wafers from Soitec
[Advanced Substrate News]
ARTICLE Workshop: Fully Depleted SOI - February 24, 2012 - San Francisco, CA - Presentations available
[SOI Industry Consortium]