NEW Filter our 213 articles by market or company:
• IBM, STM, Hitachi, Leti, Soitec on FD-SOI
• Special supplement: SOI Industry Consortium
• Medical apps: KEK, Hitachi, UCL, Nanosens
• IEEE fellows, Industry Buzz and more

Aug. 23, 2010 Is SOI the Holy Grail solution for addressing the power gap in advanced SoC designs?
[ARM Community Blogs]
Jun. 23, 2010 SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]
Jun. 9, 2010 Cadence Announces Comprehensive SOI Design Hub
[Cadence]
May. 24, 2010 Cadence, IBM team for 32-nm SOI IP
[EDN]
Apr. 7, 2010 Getting IP, Tools, And People “Ready For SOI”
[Cadence]
Apr. 6, 2010 The Time is Right for SOI Technology Adoption
[ChipEstimate.com]
Mar. 23, 2010 Design Chain Solution for Silicon-on-Insulator Technology
[Low-Power Design]
Mar. 23, 2010 Consortium rallies IP vendors behind SoI
[EDN]
Mar. 23, 2010 ARM, IBM, Cadence build SOI IP ecosystem
[EE Times]
Mar. 23, 2010 Major Semiconductor Companies Join Forces To Launch Design Chain Solution For Silicon-On-Insulator Technology
[PitchEngine]
Mar. 23, 2010 Education to reduce barriers to SOI adoption
[EE Times]
Mar. 23, 2010 IBM, ARM and Cadence act to make SOI chips cost-effective
[Electronics Weekly]
Dec. 4, 2009 ASN 14 Special Supplement: Soi Industry Consortium
[Advanced Substrate News]
Nov. 24, 2009 Mentor joins SOI consortium
[EE Times]
Nov. 13, 2009 Mentor joins SOI Industry Consortium
[EDN]
Nov. 13, 2009 Mentor Graphics joins SOI consortium
[EE Times]
Nov. 1, 2009 Comparing SOI and bulk FinFETs: Performance, manufacturing variability, and cost
[Solid State Technology]
Oct. 13, 2009 ARM teaches world how to use SOI process technology
[Electronics Weekly]
Oct. 8, 2009 ARM forces rethink on low-power process technology
[Electronics Weekly]
Oct. 8, 2009 ARM reports 45-nm SOI test chip with 40% power-saving
[EE Times]
Oct. 8, 2009 ARM Announces 45nm SOI Test Chip Results That Demonstrate Potential 40 Percent Power Savings Over Bulk Process
[ARM]
Sep. 14, 2009 Green Electronics – Is SOI The Answer?
[Cadence]
Aug. 20, 2009 SOI Industry Consortium stalks the “green thing”
[EDN]
Jul. 30, 2009 ASN 13 Special Supplement: Soi Industry Consortium
[Advanced Substrate News]
Jul. 28, 2009 SOI Makes Electronics Simply Greener
[ECN Asia]
Jul. 27, 2009 SOI group eyes 3D, green benefits
[Solid State Technology]
Jul. 24, 2009 SOI to save energy?
[New Electronics]
Jul. 22, 2009 Consortium Touts SOI's Green Credentials
[ITBusinessEdge.com]
Jul. 22, 2009 SoI Industry Consortium stalks the Green Thing
[EDN]
Jul. 22, 2009 Consortium pitches SOI's green credentials
[EE Times]
Jul. 22, 2009 SOI could chop $800 billion from US power bills
[TG Daily]
Jul. 22, 2009 Old Chip Tech Establishes Its Green Credentials
[Greentech Media]
Jun. 18, 2009 Three prestigious universities join SOI Industry Consortium
[Fabtech]
May. 27, 2009 ASN 12 Special Supplement: Soi Industry Consortium
[Advanced Substrate News]
Mar. 18, 2009 SOI coming into its own
[Compute Scotland]
Mar. 15, 2009 SOI draws line in the sand
[EuroAsia Semiconductor]
Mar. 13, 2009 Plumbing 101: Current Leakage And What to Do About It
[Low-Power Design Community]
Dec. 3, 2008 ASN 11 Special Supplement: Soi Industry Consortium
[Advanced Substrate News]
Nov. 20, 2008 SOI Goes Mainstream
[System Level Design Community]
Nov. 14, 2008 IC downturn in 'unknown territory,' says Soitec CEO
[EE Times]
Nov. 10, 2008 IBM rolls 45-nm SOI foundry service
[EE Times]
Nov. 10, 2008 IBM intros 45-nm SOI foundry offering, maintains SOI competitive benefits to bulk CMOS
[Electronic News]
Sep. 16, 2008 SOI offers early chapters for unconverted
[Compute Scotland]
Sep. 16, 2008 SOI consortium offers promotional guide book
[EE Times]
Jul. 17, 2008 SOI gathers steam
[EE Times]
Jul. 16, 2008 ASN 10 Special Supplement: Soi Industry Consortium
[Advanced Substrate News]
Jul. 16, 2008 NVIDIA joins SOI Industry Consortium as 23rd member
[Fabtech]
Jul. 16, 2008 Nvidia to Explore SOI Manufacturing Technology
[X-bit labs]
Jun. 29, 2008 Semiconductor companies eye SOI advantages and obstacles
[SCDsource]
May. 14, 2008 ASN 9 Special Supplement: Soi Industry Consortium
[Advanced Substrate News]
Mar. 20, 2008 Soitec: Now is opportune time for China to benefit from SOI
[EDN]
Mar. 10, 2008 SOI Industry Consortium welcomes Magma as 21st member
[Fabtech]
Feb. 20, 2008 Applied Materials joins SOI consortium
[EE Times]
Feb. 19, 2008 Applied joins SOI effort
[EDN]
Jan. 16, 2008 Silicon-on-insulator targets IC design mainstream
[SCDsource]
Jan. 15, 2008 SOI Consortium elects first board of directors
[EE Times]
Oct. 31, 2007 ASN 8 - The Launching of the SOI Industry Consortium
[Advanced Substrate News]
Oct. 15, 2007 Mobile market could see SOI demand boost, says Gartner
[Fabtech]
Oct. 12, 2007 Electronics leaders launch SOI Industry Consortium
[Small Times]
Oct. 10, 2007 SOI Industry Consortium Formed to Accelerate SOI Innovation
[Tech-On!]
Oct. 10, 2007 ARM in Group to Speed up Silicon-On-Insulator Innovation
[IQ Online]
Oct. 10, 2007 Consortium formed to promote SOI technology
[EE Times Asia]
Oct. 9, 2007 SOI Consortium launched
[Fabtech]
Oct. 9, 2007 Consortium formed to speed SOI opportunities
[EuroAsia Semiconductor]
Oct. 9, 2007 The semiconductor industry has finally worked out that some technologies are just too big for one company to keep to itself
[Electronicstalk]
Oct. 9, 2007 Silicon-on-insulator consortium formed to accelerate adoption
[EDN]
Oct. 9, 2007 French Stocks Advance; TF1, M6, Sanofi-Aventis Shares Gain
[Bloomberg]
Oct. 9, 2007 Industry Leaders Launch SOI Consortium
[Electronic Design]
Oct. 9, 2007 Consortium plans to push SOI
[The Institution of Engineering and Technology]
Oct. 9, 2007 SOI gets industry boost
[New Electronics]
Oct. 8, 2007 Soitec welcomes industry-wide effort to accelerate SOI innovation into broad markets
[The Soitec Group]
Oct. 8, 2007 Innovative Silicon Inc. Joins SOI Industry Consortium as a Founding Member
[Innovative Silicon]
Oct. 8, 2007 Chipmakers, partners join to push SOI use
[Solid State Technology]
Oct. 8, 2007 Group forms SOI consortium
[EE Times]
• White paper on Silicon On Insulator (SOI) implementation [Infotech Enterprises Ltd.]
• Roadmap for nanometer ultra-low-power digital circuits based on sub/near-threshold CMOS logic [UC Louvain]
texte [Chipestimate.tv]
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]