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Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]
SOI Technology
[ISU Electrical and Computer Engineering Archives]
SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]
Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]
ST: FD-SOI for Competitive SOCs at 28nm and Beyond
[Advanced Substrate News]
Power, Performance, Cost. FDSOI lets you pick any three. Want proof? How about an ARM Cortex-M0 processor core example?
[EDA360 Insider]
Video interview of David Desharnais (Cadence) by Jeff Wolf (SOI Industry Consortium)
[Chipestimate.tv]
Peregrine's New SP5T RF Switch Offers High Isolation for Infrastructure Apps
[Consumer Electronics Net]
RF Micro Devices(R) Introduces First Silicon Switches for 3G Smartphones and Other High Performance Applications
[RF Micro Devices]
Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption.
[Department of Information Technology (INTEC), Ghent University]
Device engineering for silicon photonics
[NPG Asia Materials]
A new integrated SOI power device based on self-isolation technology
[State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China]
NXP has launched the UBA2024 and UBA2024A integrated half-bridge power ICs, based on the company’s EZ-HV SOI technology
They enable the easy design of low-cost, very compact, high-reliability, long-life florescent lamp (CFL) applications.
[NXP]
How an SOI MEMS are built : MEMS first™ process
[SiTime]
A 12GHz bulk-micromachined RF-MEMS phase shifter by SOI layer-separation design
[IEICE Electronics Express]
Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin
[Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]
Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability
[EV Group (EVG)]

Last post on February 03, 2012:
STMicroelectronics predicts its new SOI-based STOD13AS power chip could be used in nearly every new smartphone or small electronic device that has an AMOLED display
#18 - Fall/Winter 2011/12
SOI on the Roadmaps

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SAN JOSE, Calif. (June 3, 2008) – The Global Semiconductor Alliance (GSA), an organization focused on accelerating the growth of the global semiconductor industry, and the SOI Industry Consortium, a group of leading companies throughout the electronics industry focused on accelerating silicon-on-insulator (SOI) innovation into broad markets, today jointly announce the completion of a global study focused on SOI. Over 100 semiconductor companies involved in the design of integrated circuits responded to the survey about their needs and perceptions of SOI. Eighty-seven percent of respondents indicated that they are interested in evaluating or are already using SOI, particularly for power savings at mainstream technology nodes starting with 90 nanometers. The survey also confirms the need to educate the market on available solutions, methodology and training across the global ecosystem, points that are being addressed by the SOI Industry Consortium. “We are pleased to field the study which will gauge perceptions of semiconductor companies on SOI technology,” said Jodi Shelton, GSA co-founder and executive director. “The collaboration on this survey with the SOI Industry Consortium provides us with a platform from which we can determine industry education for the global community on SOI potential alternatives and benefits.” “The results of the study show that there is an interest in SOI throughout the greater chip design, manufacturing and electronics community,” notes Horacio Mendez, executive director of the SOI Industry Consortium. “Respondents indicate that one of the main reasons they’re looking at SOI is to solve low-power challenges.” The SOI study was delivered online to global semiconductor companies and completed in April 2008. A full report will be available on the GSA and the SOI Industry Consortium respective websites by June 16, 2008.
About GSA: GSA’s mission is to accelerate the growth and increase the return on invested capital of the global semiconductor industry by fostering a more effective fabless ecosystem through collaboration, integration and innovation. It addresses the challenges within the supply chain including IP, EDA/design, wafer manufacturing, test and packaging to enable industry-wide solutions. Providing a platform for meaningful global collaboration, the Alliance identifies and articulates market opportunities, encourages and supports entrepreneurship, and provides members with comprehensive and unique market intelligence. Members include companies throughout the supply chain representing 25 countries across the globe. www.gsaglobal.org About the SOI Industry Consortium: The SOI Industry Consortium is chartered with accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. Representing leaders spanning the entire electronics industry infrastructure, SOI Industry Consortium members include: AMD, Applied Materials, ARM, Cadence Design Systems, CEA-Léti, Chartered Semiconductor Manufacturing Ltd, Freescale Semiconductor, IBM, Innovative Silicon, KLA-Tencor, Lam Research, Magma, NXP, Samsung, Semico, Soitec, SEH Europe, STMicroelectronics, Synopsys, TSMC, Tyndall Institute and UMC. Membership is open to all companies and institutions throughout the electronics industry.
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ARTICLE Intel Delays Finfets
[Electronics Weekly]
ARTICLE ST: FD-SOI for Competitive SOCs at 28nm and Beyond
[Advanced Substrate News]
ARTICLE White paper: Considerations for Bulk CMOS to FD-SOI Design Porting
[SOI Industry Consortium]
ARTICLE Workshop: Fully Depleted SOI - April 28, 2011 - Hsinchu, Taiwan
[SOI Industry Consortium]
PUBLICATION Planar FD-SOI CMOS: The Competitive Advantage Mobile Silicon Technology
[SOI Industry Consortium]
PRESENTATION Evaluation of Fully-Depleted SOI for next generation Mobile Consumer Chips
[Horacio Mendez, Executive Director, SOI Industry Consortium]