SOI Applications

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SOI Fundamentals

Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]

SOI Technology
[ISU Electrical and Computer Engineering Archives]

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Process Technology

SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]

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Photonics

Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption. [Department of Information Technology (INTEC), Ghent University]

Device engineering for silicon photonics
[NPG Asia Materials]

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Power

A new integrated SOI power device based on self-isolation technology
[State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China]

NXP has launched the UBA2024 and UBA2024A integrated half-bridge power ICs, based on the company’s EZ-HV SOI technology
They enable the easy design of low-cost, very compact, high-reliability, long-life florescent lamp (CFL) applications. [NXP]

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Sensors/MEMS

How an SOI MEMS are built : MEMS first™ process
[SiTime]

A 12GHz bulk-micromachined RF-MEMS phase shifter by SOI layer-separation design
[IEICE Electronics Express]

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3D integration

Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin [Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]

Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability [EV Group (EVG)]

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Last post on February 03, 2012:

STMicroelectronics predicts its new SOI-based STOD13AS power chip could be used in nearly every new smartphone or small electronic device that has an AMOLED display

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#18 - Fall/Winter 2011/12
SOI on the Roadmaps

FD-SOI: ST & 28nm SOCs; ARM & design porting
Apps – NXP automotive sensors, AMD 32nm Bulldozer
SOI Conference (IBM, Intel, Leti, GloFo, ST, ARM, Peregrine & more)
SOI Consortium – FD-SOI whitepaper overview & excerpts

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Press releases

The SOI Industry Consortium announces key focus areas for 2009

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BOSTON, MASS., March 17, 2008 – The SOI Industry Consortium, aimed at accelerating broad adoption of silicon-on-insulator (SOI) across semiconductor markets, announced today its key areas of focus for the current year: IP, low power, and the fabless community. These three pillars form the foundation upon which the consortium will orient both internal resources and external outreach. More specifically, the consortium will work to identify and close any remaining gaps in SOI-specific design IP, further quantify and promote the low-power advantages of SOI, and reach out to educate designers, particularly in the fabless community. “Despite the uncertainty of the global economy, we are looking at significant market opportunities and expansion for SOI. Those that can play the innovation card this year will be the ones ready with the right new products and technologies when the global economy resumes its upward course. I recently visited many companies in the US, Japan and Europe, who are expressing keen interest in the broad cross-section of expertise the Consortium can leverage,” says Horacio Mendez, Executive Director of the SOI Industry Consortium. “By focusing on IP, low power and the fabless community, the SOI Consortium is providing the most value both for our members and the industry at large.” A joint survey between the SOI Industry Consortium and the Global Semiconductor Alliance (GSA) last year indicated that low power is the primary driver for designers considering SOI-based solutions. Therefore, both the IP and outreach efforts will put a special emphasis on the green, energy-saving advantages of SOI. Within the consortium membership, a dedicated IP committee has been actively working to close the remaining IP gaps, thereby facilitating mainstream SOI adoption. Collaboration between various partners will demonstrate the performance of most common IP on SOI and solidify the ecosystem around the foundries. The technology enablement team complements these efforts by accelerating ecosystem collaboration and by joining forces in an ongoing series of benchmarking studies. To further support the foundries, a special effort is being made to reach out to the design community. Following on the success of last year’s Consortium-sponsored design clinics in Taiwan and in the USA, three more are planned for this year in the USA and India. The Consortium will also be present and/or sponsor workshops at several industry events. Additional chapters of the “SOI Implementation Guide” supporting specific market segments, will continue to be published on a rolling basis. The SOI Industry Consortium is open to any company, organization or academic institution with an interest in SOI. About the SOI Industry Consortium: The SOI Industry Consortium is chartered with accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. Representing leaders spanning the entire electronics industry infrastructure, SOI Industry Consortium members include today: AMD, Applied Materials, ARM, Cadence Design Systems, CEA-Léti, Chartered Semiconductor Manufacturing, Freescale Semiconductor, IBM, IMEC, Innovative Silicon, KLA-Tencor, Lam Research, Magma Design, Nvidia, Samsung, Semico, Soitec, SEH Europe, STMicroelectronics, Symmid Semiconductor, Synopsys, Time To Market, TSMC, Tyndall Institute, University Catholique de Louvain, and UMC. Membership is open to all companies and institutions throughout the electronics industry. For more information, see www.soiconsortium.org Press Contact: Camille Darnaud-Dufour +33 (0) 6 79 49 51 43 camille.darnaud-dufour@soiconsortium.org Legal Note The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions.

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