SOI Applications

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SOI Fundamentals

Process Technology

SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]

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Fully Depleted SOI

Design/IP

Analog/HV/RF

Photonics

Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption. [Department of Information Technology (INTEC), Ghent University]

Device engineering for silicon photonics
[NPG Asia Materials]

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Power

A new integrated SOI power device based on self-isolation technology
[State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China]

NXP has launched the UBA2024 and UBA2024A integrated half-bridge power ICs, based on the company’s EZ-HV SOI technology
They enable the easy design of low-cost, very compact, high-reliability, long-life florescent lamp (CFL) applications. [NXP]

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Sensors/MEMS

3D integration

Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin [Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]

Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability [EV Group (EVG)]

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Advanced Substrate News

Last post on February 03, 2012:

STMicroelectronics predicts its new SOI-based STOD13AS power chip could be used in nearly every new smartphone or small electronic device that has an AMOLED display

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#18 - Fall/Winter 2011/12
SOI on the Roadmaps

  • FD-SOI: ST & 28nm SOCs; ARM & design porting
  • Apps – NXP automotive sensors, AMD 32nm Bulldozer
  • SOI Conference (IBM, Intel, Leti, GloFo, ST, ARM, Peregrine & more)
  • SOI Consortium – FD-SOI whitepaper overview & excerpts

> Read the full edition

Press releases

BroadPak joins SOI Industry Consortium

SOI Ecosystem Expands to Include Advanced Packaging Development


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Boston, MASS., May 6, 2010 – The SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation across broad markets, announced today that BroadPak has joined the worldwide organization. BroadPak is a premier provider of semiconductor package design and development services.  The addition of BroadPak, with its unique silicon-package co-design methodology, expands opportunities for SOI chip developers to reduce product cost and improve chip and system performance without impacting chip development schedules.

 “BroadPak brings its expertise in advanced high-performance, high pin-count package design and test to the SOI community,” said Farhang Yazdani, president and chief technical officer of Broadpack.  “We look forward to collaborative relationships with other members of the SOI Industry Consortium to meet the demands of the highly integrated, high performance and low voltage systems that are made possible with SOI.”

“We are extremely pleased to have BroadPak join us,”said Horacio Mendez, executive director of the SOI Industry Consortium. “As a leading supplier of advanced packaging design services, BroadPak brings valuable and complementary expertise to our ecosystem of companies and assembly-level enablement in this time of SOI market acceleration.”

 The SOI Industry Consortium welcomes companies, organizations, government and academic institutions to join the group in extending Moore’s law scaling and applying the full benefits of SOI-based electronics to global sustainability challenges, lowering the total cost-of-ownership of electronics and improving the quality of life. 



About the SOI Industry Consortium:

 The SOI Industry Consortium is chartered with accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. Providing a platform for global collaboration throughout the value chain, the SOI Industry Consortium’s membership includes: ARM, BroadPak, Cadence Design Systems, CEA-Léti, Freescale Semiconductor, GLOBALFOUNDRIES, IBM, IMEC, Infotech, Innovative Silicon, Kanazawa Institute of Technology, KLA-Tencor, MEMC, Mentor Graphics, MIT Lincoln Laboratories, Nvidia, Ritsumeikan University, Samsung, Semico, SEH Europe, Soitec, Stanford University, STMicroelectronics, Synopsys, Tyndall Institute, University of California-Berkeley, University Catholique de Louvain, UMC and Varian.  Membership is open to all companies and institutions throughout the electronics industry. For more information please visit www.soiconsortium.org. .

 

Press Contacts:                                                             

Jeff Wolf
+1 925 989-6797
jeff.wolf@soiconsortium.org

 

Legal Note

The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions.


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