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Workshop: "Fully Depleted SOI", sponsored by Soitec and the SOI Consortium
December 2009 - Baltimore
Experts from around the world gather in Baltimore in December 2009 for a very lively debate on the progress and merits of Fully Depleted SOI. These are the experts' presentations:
ETSOI substrate readiness for FDSOI (Dr. B. Doris, IBM)
Models for FDSOI: BSIM, SPICE (Prof. C. Hu, Univ. California Berkeley)
FDSOI Benefits for SRAM at the 22nm Node (Prof. T.J. King, Univ. California Berkeley)
ARM 1176 implementation in SOI 45nm technology and silicon measurement and outlook towards FDSOI (Dr. Greg Yeric, ARM)
Comparing SOI and bulk FinFETs: Performance, manufacturing variability, and cost [Solid State Technology]
White paper on Silicon On Insulator (SOI) implementation [Infotech Enterprises Ltd.]
[Chipestimate.tv]
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]