SOI Applications
NEW Filter our 376 articles by market or company:
Updated: May 17, 2013
SOI Fundamentals
Bulk vs SOI FinFET
[SOI Industry Consortium]
Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]
Process Technology
SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]
Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]
Fully Depleted SOI
NEW Forum: FD-SOI Technology - April 22nd, 2013 - Hsinchu, Taiwan
[SOI Industry Consortium]
DATE: FDSOI costs to match bulk by year end, says ST
[Tech Design Forum]
Design/IP
GlobalFoundries to Fab 28/20nm FD-SOI Chips for ST; ST Technology Open to Other GF Customers
[Advanced Substrate News]
Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]
Analog/HV/RF
High Voltage and High Reliability Silicon-on-Insulator Power IC Technologies and Their Application to 750 V 4.5 A Micro-Inverter IC
[Japanese Journal of Applied Physics 51 (2012)]
Smart power saves power
ST’s newest SOI-based smart power technology delivers big reductions in power consumption in medical equipment, hybrid-electric-vehicle chargers and more.
[Advanced Substrate News]
Photonics
Imec and Genalyte have successfully developed and produced a set of disposable SOI-photonics biosensor chips for Genalyte’s diagnostic and molecular detection equipment
[Advanced Substrate News]
Photonics on the Move
SOI is at the heart of silicon photonics. Here’s an overview of past, present and future trends.
[Advanced Substrate News]
Power
NovaThor SmartPhone Chip on 28nm FD-SOI: ST-Ericsson Blogger Tells All; PC Mag Sees Light
[Advanced Substrate News]
Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]
Sensors/MEMS
SiTime: Using SOI Technology to Develop High-Performance MEMS Timing Solutions
A radical SOI-based approach puts SiTime at the top of the fast-growing silicon-based timing market.
[Advanced Substrate News]
Imec and Genalyte have successfully developed and produced a set of disposable SOI-photonics biosensor chips for Genalyte’s diagnostic and molecular detection equipment
[Advanced Substrate News]
3D integration
Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin
[Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]
Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability
[EV Group (EVG)]
Last post on May 17, 2013 by Jean-Luc PELLOIE:
IEEE SOI Conference (Oct., Monterey) Expands, Extends Call for Papers
#20 – Fall/Winter 2012/13
The Move to Fully-Depleted: Manufacturing, Economics, Design
- FD-SOI: ST/Chery interview; CMP's MPW runs; IBS on cost-savings
- FD & wafers: SEH & Soitec
- IBM's Fin-on-Oxide/FinFET
- SOI Consortium – FD-SOI & wafer capacity for mobile
Innovative wafers for energy-efficient CMOS technology
By Xavier Cauchy, Digital Applications and Strategic Marketing, Soitec
20nm FD SOI logic evaluation model cards available
Enabled in cooperation with Accelicon
Evaluation of Fully-Depleted SOI for next generation Mobile Consumer Chips
By Horacio Mendez, Executive Director
Economic impact of the technology choices at 28nm/20nm
By Dr. Handel Jones, founder and CEO, IBS, Inc.
Fully Depleted SOI Corner
Access to all workshops' presentations, white papers, articles and more!
Bulk vs SOI FinFET
Practical challenges of FinFETs: variability and manufacturability
Hot news
PRESENTATION Forum: FD-SOI Technology - April 22nd, 2013 - Hsinchu, Taiwan
[SOI Industry Consortium]
EVENT FD-SOI Workshop 2013 - June 15, 2013 - Kyoto, Japan
[SOI Industry Consortium]
PRESENTATION Symposium: Fully Depleted Transistors Technology - December 10, 2012 – San Francisco, CA
[SOI Industry Consortium]
WHITE PAPER White paper: Innovative wafers for energy-efficient CMOS technology
WHITE PAPER White paper: Economic impact of the technology choices at 28nm/20nm
ARTICLE DAC 2012: video interview of Horacio Mendez, Executive Director, SOI Industry Consortium
[EDACafe.com]
Watch all videos from the Jump Start Training event.
View and listen to the SOI training modules.
• > SOI Self Heating (Bob Ulicki, September 2009)
• > SOI I/O Design (Bob Ulicki, September 2009)
• > SOI - The "Floating" Body (Bob Ulicki, September 2009)
• > Designing with SOI SRAMs (Bob Ulicki, October 2009)
Download the presentations of the October 21, 2009 conference.
• Introduction
by Horacio Mendez, SOI Industry Consortium
• SOI Fundamentals
by Bob Ulicki, SOI Industry Consortium
• Designing Low Power Circuits on SOI
by Olivier Thomas, CEA-Leti
• Designing High Performance Microprocessors on SOI
by Nghia Phan, IBM
SOI Ecosystem
