SOI Applications

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SOI Fundamentals

Chris Edwards explores the 'tricks' semiconductor device manufacturers are using to cope with shrinking feature sizes
[New Electronics]

SOI Technology
[ISU Electrical and Computer Engineering Archives]

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Process Technology

SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]

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Photonics

Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption. [Department of Information Technology (INTEC), Ghent University]

Device engineering for silicon photonics
[NPG Asia Materials]

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Power

A new integrated SOI power device based on self-isolation technology
[State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China]

NXP has launched the UBA2024 and UBA2024A integrated half-bridge power ICs, based on the company’s EZ-HV SOI technology
They enable the easy design of low-cost, very compact, high-reliability, long-life florescent lamp (CFL) applications. [NXP]

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Sensors/MEMS

How an SOI MEMS are built : MEMS first™ process
[SiTime]

A 12GHz bulk-micromachined RF-MEMS phase shifter by SOI layer-separation design
[IEICE Electronics Express]

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3D integration

Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin [Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]

Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability [EV Group (EVG)]

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Last post on February 03, 2012:

STMicroelectronics predicts its new SOI-based STOD13AS power chip could be used in nearly every new smartphone or small electronic device that has an AMOLED display

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#18 - Fall/Winter 2011/12
SOI on the Roadmaps

FD-SOI: ST & 28nm SOCs; ARM & design porting
Apps – NXP automotive sensors, AMD 32nm Bulldozer
SOI Conference (IBM, Intel, Leti, GloFo, ST, ARM, Peregrine & more)
SOI Consortium – FD-SOI whitepaper overview & excerpts

> Read the full edition

White papers

White paper: Considerations for Bulk CMOS to FD-SOI Design Porting
The scope of this study is to examine the efforts required for a straight “port” of an existing bulk CMOS design to FD-SOI at the same node. The objective would be to get value from FD-SOI for a modest redesign effort – even if this means not necessarily taking maximum advantage of the potentialities of FD-SOI. The focus is on FD-SOI with Ultra-Thin Buried Oxide. This document intends to be sufficiently generic to be applicable to different possible implementations of the FD-SOI technology by foundries.
[SOI Industry Consortium]

White paper: Fully Depleted SOI - Designed for low power
FULLY DEPLETED SOI is a CMOS silicon technology specifically designed to operate at very low power while maximizing performance, manufacturability and reducing the overall cost.
[Horacio Mendez, Executive Director, SOI Industry Consortium]

White paper: Forecasted impact of FD SOI technology on design
As potential users of Fully Depleted Silicon-on-Insulator (FD-SOI) technology for the 22nm/20nm CMOS node and beyond realize its many interests, the question of its impact on design practices arises. Although FD-SOI for next generation technology nodes is not on commercial offer yet, it is nevertheless important to bring early answers or indications to that question. This document therefore proposes a synthesis of what is known or can be reasonably expected from FD-SOI from a design perspective, and indicates some interesting new potentialities that designers may be able to exploit.
[By Xavier CAUCHY, Digital Application Manager, Soitec]

White paper: Questions and answers on FD SOI technology
This document is a high level introduction to FD-SOI technology and its applicability to next technology nodes, in the form of a few key questions and their quick answers. No deep technical details are provided here, however Question 15 provides some relevant links. Short answers are provided first (hypertext links are provided, just click on the question of interest), followed by slightly more detailed answers for the interested readers.
[By Xavier CAUCHY, Digital Applications Manager, Soitec, with François ANDRIEU, Senior Research Engineer, LETI]

White paper on Silicon On Insulator (SOI) implementation
by Narayana Murty Kodeti
[Infotech Enterprises Ltd.]