SOI Applications

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Updated: April 30, 2012

SOI Fundamentals

Process Technology

SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Hot carrier injection from nanometer-thick silicon-on-insulator films measured by optical second-harmonic generation
[Applied Physics Letters, Vol. 96, Issue 24]

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Fully Depleted SOI

Design/IP

NEW Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]

Interview With ST-Ericsson's Chief Chip Architect: SOCs on 28nm FD-SOI – When, Why and How
ST-Ericsson's Chief Chip Architect Louis Tannyeres talks with ASN about the move to 28nm FD-SOI for smartphones and tablet SOCs. [Advanced Substrate News]

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Analog/HV/RF

Photonics

Ultra-high Speed, All-optical Wavelength Converters Using Single SOA and SOI Photonic Integrated Circuits
We report a new family of ultra-fast all-optical wavelength converters. The device architecture employs a single SOA and filtering elements integrated in silicon-on-insulator substrates. These schemes enable high-integration density and low power consumption. [Department of Information Technology (INTEC), Ghent University]

Device engineering for silicon photonics
[NPG Asia Materials]

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Power

NEW Leti: Adding Strain to FD-SOI for 20nm and Beyond
[Advanced Substrate News]

Interview With ST-Ericsson's Chief Chip Architect: SOCs on 28nm FD-SOI – When, Why and How
ST-Ericsson's Chief Chip Architect Louis Tannyeres talks with ASN about the move to 28nm FD-SOI for smartphones and tablet SOCs. [Advanced Substrate News]

> More articles

Sensors/MEMS

SiTime: Using SOI Technology to Develop High-Performance MEMS Timing Solutions
A radical SOI-based approach puts SiTime at the top of the fast-growing silicon-based timing market. [Advanced Substrate News ]

How an SOI MEMS are built : MEMS first™ process
[SiTime]

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3D integration

Wireless Interconnects for Inter-tier Communication on 3D ICs
By Ankit More and Baris Taskin [Department of Electrical and Computer Engineering, Drexel University 3141 Chestnut Street, Philadelphia, Pennsylvania 19104, USA]

Fraunhofer IZM-ASSID selects EV Group Temporary Bonding and Debonding Equipment for Devoloping Processes for High-Volume Manufacturing of 3D ICS
EVG Systems Selected for Platform Flexibility, Functionality and Industry-Proven Reliability [EV Group (EVG)]

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Advanced Substrate News

Last post on May 02, 2012:

Consortium Website – What’s New

> Read this post

#19 – Spring/Summer 2012
Special Edition: FD-SOI Industrialization

  • Technology: ST/Soitec white paper excerpts
  • Apps – ST-Ericsson's NovaThor at 28nm (interview)
  • 20nm & Beyond: Chenming Hu; Leti
  • Wafers: Soitec's Roadmap
  • SOI Consortium – benchmarking

> Read the full edition

GLOBALFOUNDRIES

GLOBALFOUNDRIES is the leading volume producer of state-of-the-art high-performance Silicon on Insulator (SOI) integrated circuits. Through reduction of parasitic device capacitance, SOI enables increased performance at reduced power. In close collaboration with IBM, GLOBALFOUNDRIES has consistently pioneered the introduction of leading-edge SOI-based technologies that combine with our industry-leading interconnect technologies to maximize transistor switching performance and power efficiency. 45nm High-Performance SOI is now in volume production in GLOBALFOUNDRIES' Fab 1 Manufacturing Facility.

More information:
http://www.globalfoundries.com/technology/leading_edge_tech.aspx