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"ARM designs physical and processor IP at the heart of low-power products across a wide range of applications. SOI technology with ARM IP enables our partners to realize maximum green benefits in their design,” said Simon Segars, EVP and General Manager, Physical IP Division of ARM, "Our IP enables SoC designers to integrate SOI IP into their standard ASIC/COT design flows to help them achieve up to 50% reduction in dynamic power consumption." "As a leader in low power design, Cadence continues to invest heavily in new technologies and methodologies to provide maximum power efficiency, now a key consideration for all designs," said Dr. Chi-Ping Hsu, senior vice president of research and development for the implementation group at Cadence. "We are pleased to announce our end-to-end support for the SOI process within the Cadence Low Power Design Solution, thereby offering customers an integrated and low-risk path to maximizing the potential SOI benefits on their green designs." "The unique characteristics of SOI enables clients to achieve high performance, low power and high density chip designs." said Mark Ireland, vice president, IBM Semiconductor Platforms. "This cutting-edge technology is being adopted in a wide range of applications including systems, networking, storage, gaming and consumer applications. SOI has been an integral part of IBM's system leadership. " “SOI can save 30% and still enable increased performance,”said André-Jacques Auberton-Hervé, Chairman of the SOI Consortium. “For those looking to make a bigger reduction in their power budget, SOI can enabled up to 50% savings in power at a constant performance level. These are motivating figures, especialy when put in the context of high-volume consumer markets.” “For those of us in the SOI community, being “green” has always been an integral part of our agenda,” said Dr. Jocelyne Wasselin, VP Business Development at Soitec. “Whether the primary driver for using SOI is power savings, performance or integration challenges, there is a cascading cost effect enabling effi ciencies at virtually all levels of the value chain.” “Designing today’s low-power chips on SOI substrates with Synopsys’ Eclypse low-power design solution delivers greener designs and systems.” - Kevin Kranen, Director of Strategic Alliances, Synopsys Inc. "UMC has been incorporating the benefits of SOI technology across multiple semiconductor applications such as MEMS, photonics, and our 65nm high-speed process portfolio," said W.Y. Chen, senior vice president of UMC. "The energy efficiency of SOI adds to the attractiveness of the technology and conforms with UMC's green initiative to provide environmentally friendly processes for our customers. We look forward to further developing SOI to provide customers with solutions that enable more innovative applications for a better and greener planet." "SOI is the technology of choice for our R&D on Ultra-Low-Power applications (www.dice.ucl.ac.be/greenelectronics/)," said Prof. Denis Flandre, Université Catholique de Louvain, Belgium. "Optimal and innovative design techniques have indeed helped us demonstrate ultra-low-voltage and ultra-low-leakage SOI circuits with about 10x power improvements, and sometimes even much more."

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